ENBL=0, SOURCE=0, TRIG=0
Channel Configuration register
| SOURCE | DMA Channel Source (Slot) 0 (0): Disable_Signal 2 (2): LPUART0_Rx_Signal 3 (3): LPUART0_Tx_Signal 16 (16): SPI0_Rx_Signal 17 (17): SPI0_Tx_Signal 18 (18): SPI1_Rx_Signal 19 (19): SPI1_Tx_Signal 20 (20): LTC0_Input_FIFO_Signal 21 (21): LTC0_Output_FIFO_Signal 22 (22): I2C0_Signal 23 (23): I2C1_Signal 24 (24): TPM0_Channel0_Signal 25 (25): TPM0_Channel1_Signal 26 (26): TPM0_Channel2_Signal 27 (27): TPM0_Channel3_Signal 32 (32): TPM1_Channel0_Signal 33 (33): TPM1_Channel1_Signal 34 (34): TPM2_Channel0_Signal 35 (35): TPM2_Channel1_Signal 40 (40): ADC0_Signal 42 (42): CMP0_Signal 45 (45): DAC0_Signal 47 (47): CMT_Signal 49 (49): PortA_Signal 50 (50): PortB_Signal 51 (51): PortC_Signal 54 (54): TPM0_Overflow_Signal 55 (55): TPM1_Overflow_Signal 56 (56): TPM2_Overflow_Signal 57 (57): TSI0_Signal 60 (60): AlwaysOn60_Signal 61 (61): AlwaysOn61_Signal 62 (62): AlwaysOn62_Signal 63 (63): AlwaysOn63_Signal |
| TRIG | DMA Channel Trigger Enable 0 (0): Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode) 1 (1): Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode. |
| ENBL | DMA Channel Enable 0 (0): DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel. 1 (1): DMA channel is enabled |